PRODUCTSMPS Design Rule Check [Option]
Learn more about SMPS Design Rule Check
What Is SMPS Design Rule Check?
As electronic devices become smaller and more energy-efficient, the need to mitigate power supply noise generated by power modules is increasing.
SMPS Design Rule Check provides nine design rules for switching power supply layouts, covering current loop paths, noise propagation, snubber circuits, and feedback signals.
EMI Check Batch Execution
Key features include:
- ・Nine design rules validated based on switching power supply design expertise and practical case studies.
- ・Visualizes current loop paths during FET switching (ON/OFF), allowing users to visually verify the shortest current paths.
- ・Automatically generates design reports based on check results, which can be used as design verification evidence and design review sheets.
These features help optimize PCB layouts to suppress noise generation and propagation.
- * This is an optional feature. It is included as standard in the EMIStream Expert Edition and is also available as a standalone feature.
SMPS Design Rule Check: Check Items
NEC's EMI countermeasure technology is incorporated into the software.
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Current Loop Paths
- 1：Current Loop Layer Check
- 2：Current Loop Path Length Check
- 3：Current Loop Reference Check
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Noise Propagation
- 4：Current Loop Ground Area Check
- 5：Current Loop Interference Check
- 6：Filter Check
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Snubber Circuit
- 7：Snubber Circuit Presence Check
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Feedback Signals
- 8：FB Signal–Current Loop Interference Check
- 9：FB Signal–Inductor Interference Check
Examples of Design Rules
Current Loop Path Checks
Current Loop Layer Check: Error Example
When a current loop spans multiple layers, noise generation and propagation risks increase due to factors such as the inductance of vias. It is also important to keep current loop paths as short as possible.
These checks verify that the current loop is formed entirely on a single layer, that the current loop path is not excessively long, and that an adequate reference ground is provided for the current loop.
- Example: Current Loop Layer Check
Verifies that the current loop is formed on a single layer.
Noise Propagation Prevention Checks
Illustration of Current Loop Interference
To prevent noise from propagating from current loops, these checks verify that filter components are connected correctly, that current loops do not interfere with one another, and that the ground plane forming the current loop is not excessively large.
- Example: Current Loop Interference Check
When multiple DC-DC converters are present on a single PCB, this check detects overlapping current loop paths.